As a general trend, wavelengths of light used in optical exposing systems to expose photoresist layers on integrated circuit wafers have been decreasing to provide increased resolutions. In optical exposing systems using short wavelength light, such as that generated using KrF in a fluorine excimer laser, for example, an optical exposing system may be connected in-line with a coating/developing system (CDS) used to coat wafers with photoresist and to develop the exposed photoresist on the wafers. The in-line connections may be provided to reduce degradation of photoresist resulting from exposure to ammonia. By reducing exposure to ammonia, a quality of an exposed image may be improved. Optical exposing systems are discussed, for example, in U.S. Patent Publication No. 2002/0011207 to Uzawa et al. (hereinafter “Uzawa”), the disclosure of which is hereby incorporated herein in its entirety by reference.
A CDS (coating/developing system) may include a photoresist coating unit used to coat a wafer with photoresist and a developer used to develop the exposed wafer, and an interface may be used to transport a wafer between the CDS and an exposure apparatus. The exposure apparatus may include a wafer handler used to transfer a wafer between positions therein, a pre-alignment unit used to detect a reference mark position on the wafer before exposure, a wafer stage used to support the wafer (wherein the wafer stage is driven in X, Y, Z, .theta., and tilt directions), and a manual loading/unloading port section. The pre-alignment unit pre-aligns a wafer at a predetermined temperature to reduce measurement errors that may result from expansion/contraction of the wafer.
When photolithographically patterning an integrated circuit wafer, the wafer is loaded into the CDS, and the wafer is coated with photoresist using the photoresist coating unit of the CDS. The wafer is temporarily heated to a high temperature (pre-baked) using a heating unit, and cooled using a cooling unit. The wafer passes through the interface, and is transported to the exposure apparatus. In the exposure apparatus, the wafer is pre-aligned using the pre-alignment unit, and then the wafer is set on the wafer stage. The wafer is aligned with a reticle using the wafer stage of the exposure apparatus, and the wafer is exposed to a predetermined integrated circuit image. The exposed wafer is returned to the CDS via the interface, and the wafer is heated to a relatively high temperature (referred to as a post exposure bake or PEB) using a heating/cooling unit of the CDS, cooled, and then developed using a developing unit. A time between exposing and developing processing may influence chemical changes of the photoresist. After developing the photoresist, the wafer may be heated and cooled, unloaded from the CDS, and transported for other processing operations.
Optical exposing systems are also discussed in U.S. Pat. No. 6,362,116 to Lansford, U.S. Pat. No. 6,358,672 to Jeoung et al., and Korean Publication No. 2000-0065378 to Choi et al., the disclosures of which are hereby incorporated herein in their entirety by reference.